307013-003 Datasheet, PDF (679/848 Pages) Intel Corporation – Intel I/O Controller Hub 7

PCI Express* Configuration Registers (Desktop and Mobile Only)
18.1.25 DCTL—Device Control Register
(PCI Express—D28:F0/F1/F2/F3/F4/F5)
Address Offset: 48h–49h
Default Value: 0000h
Attribute:
Size:
R/W, RO
16 bits
Bit
Description
15 Reserved
14:12 Max Read Request Size (MRRS) — RO. Hardwired to 0.
11
Enable No Snoop (ENS) — RO. Not supported. The root port will not issue non-snoop
requests.
10
Aux Power PM Enable (APME) — R/W. The OS will set this bit to 1 if the device
connected has detected aux power. It has no effect on the root port otherwise.
9 Phantom Functions Enable (PFE) — RO. Not supported.
8 Extended Tag Field Enable (ETFE) — RO. Not supported.
7:5
Max Payload Size (MPS) — R/W. The root port only supports 128-B payloads,
regardless of the programming of this field.
4 Enable Relaxed Ordering (ERO) — RO. Not supported.
Unsupported Request Reporting Enable (URE) — R/W.
3 0 = Disable. The root port will ignore unsupported request errors.
1 = Enable. The root port will generate errors when detecting an unsupported request.
Fatal Error Reporting Enable (FEE) — R/W.
2 _{0 = Disable. The root port will ignore fatal errors.}
1 = Enable. The root port will generate errors when detecting a fatal error.
Non-Fatal Error Reporting Enable (NFE) — R/W.
1 _{0 = Disable. The root port will ignore non-fatal errors.}
1 = Enable. The root port will generate errors when detecting a non-fatal error.
Correctable Error Reporting Enable (CEE) — R/W.
0 0 = Disable. The root port will ignore correctable errors.
1 = Enable. The root port will generate errors when detecting a correctable error.
Intel ^® ICH7 Family Datasheet
679