307013-003 Datasheet, PDF (653/848 Pages) Intel Corporation – Intel I/O Controller Hub 7

AC ’97 Modem Controller Registers (D30:F3) (Desktop and Mobile Only)
17.1.15 INT_LN—Interrupt Line Register (Modem—D30:F3)
Address Offset: 3Ch
Default Value: 00h
Lockable:
No
Attribute:
Size:
Power Well:
R/W
8 bits
Core
This register indicates which PCI interrupt line is used for the AC ’97 module interrupt.
Bit
Description
7:0
Interrupt Line (INT_LN) — R/W. This data is not used by the Intel^® ICH7. It is used to
communicate to software the interrupt line that the interrupt pin is connected to.
17.1.16 INT_PIN—Interrupt Pin Register (Modem—D30:F3)
Address Offset: 3Dh
Default Value: See description
Lockable:
No
Attribute:
Size:
Power Well:
RO
8 bits
Core
This register indicates which PCI interrupt pin is used for the AC ’97 modem interrupt.
The AC ’97 interrupt is internally OR’d to the interrupt controller with the PIRQB#
signal.
Bit
Description
7:3 Reserved
2:0
Interrupt Pin (INT_PN) — RO. This reflects the value of D30IP.AMIP in chipset
configuration space.
17.1.17 PID—PCI Power Management Capability Identification
Register (Modem—D30:F3)
Address Offset: 50h
Default Value: 0001h
Lockable:
No
Attribute:
Size:
Power Well:
RO
16 bits
Core
Bit
Description
15:8 Next Capability (NEXT) — RO. This field indicates that this is the last item in the list.
7:0
Capability ID (CAP) — RO. This field indicates that this pointer is a message signaled
interrupt capability.
Intel ^® ICH7 Family Datasheet
653