307013-003 Datasheet, PDF (32/848 Pages) Intel Corporation – Intel I/O Controller Hub 7

5-61SPI Implementation Options .................................................................................... 245
5-62Required Commands and Opcodes ............................................................................ 247
5-63Intel^® ICH7 Standard SPI Commands ....................................................................... 247
5-64Flash Protection Mechanism Summary....................................................................... 248
6-1 PCI Devices and Functions ....................................................................................... 254
6-2 Fixed I/O Ranges Decoded by Intel^® ICH7 ................................................................. 256
6-3 Variable I/O Decode Ranges..................................................................................... 258
6-4 Memory Decode Ranges from Processor Perspective.................................................... 259
7-1 Chipset Configuration Register Memory Map (Memory Space) ....................................... 263
8-1 LAN Controller PCI Register Address Map (LAN Controller—B1:D8:F0) ........................... 303
8-2 Configuration of Subsystem ID and Subsystem Vendor ID via EEPROM .......................... 310
8-3 Data Register Structure ........................................................................................... 314
8-4 Intel^® ICH7 Integrated LAN Controller CSR Space Register Address Map........................ 315
8-5 Self-Test Results Format ......................................................................................... 320
8-6 Statistical Counters................................................................................................. 327
8-7 ASF Register Address Map ....................................................................................... 329
9-1 PCI Bridge Register Address Map (PCI-PCI—D30:F0) ................................................... 345
10-1LPC Interface PCI Register Address Map (LPC I/F—D31:F0) .......................................... 363
10-2DMA Registers ....................................................................................................... 385
10-3PIC Registers (LPC I/F—D31:F0)............................................................................... 396
10-4APIC Direct Registers (LPC I/F—D31:F0) ................................................................... 404
10-5APIC Indirect Registers (LPC I/F—D31:F0) ................................................................. 404
10-6RTC I/O Registers (LPC I/F—D31:F0) ........................................................................ 409
10-7RTC (Standard) RAM Bank (LPC I/F—D31:F0) ............................................................ 410
10-8Processor Interface PCI Register Address Map (LPC I/F—D31:F0).................................. 415
10-9Power Management PCI Register Address Map (PM—D31:F0) ....................................... 418
10-10APM Register Map ................................................................................................. 430
10-11ACPI and Legacy I/O Register Map .......................................................................... 431
10-12TCO I/O Register Address Map ............................................................................... 456
10-13Registers to Control GPIO Address Map.................................................................... 463
11-1UHCI Controller PCI Register Address Map (USB—D29:F0/F1/F2/F3) ............................. 469
11-2USB I/O Registers .................................................................................................. 479
11-3Run/Stop, Debug Bit Interaction SWDBG (Bit 5), Run/Stop (Bit 0) Operation .................. 482
12-1SATA Controller PCI Register Address Map (SATA–D31:F2) .......................................... 489
12-2Bus Master IDE I/O Register Address Map.................................................................. 519
12-3AHCI Register Address Map...................................................................................... 523
12-4Generic Host Controller Register Address Map ............................................................ 524
12-5Port [3:0] DMA Register Address Map ....................................................................... 529
13-1USB EHCI PCI Register Address Map (USB EHCI—D29:F7) ........................................... 545
13-2Enhanced Host Controller Capability Registers ............................................................ 561
13-3Enhanced Host Controller Operational Register Address Map ........................................ 564
13-4Debug Port Register Address Map ............................................................................. 577
14-1SMBus Controller PCI Register Address Map (SMBUS—D31:F3)..................................... 583
14-2SMBus I/O Register Address Map.............................................................................. 588
15-1IDE Controller PCI Register Address Map (IDE-D31:F1) ............................................... 601
15-2Bus Master IDE I/O Registers ................................................................................... 615
16-1AC ‘97 Audio PCI Register Address Map (Audio—D30:F2) ............................................. 619
16-2Intel^® ICH7 Audio Mixer Register Configuration .......................................................... 631
16-3Native Audio Bus Master Control Registers ................................................................. 633
17-1AC ‘97 Modem PCI Register Address Map (Modem—D30:F3) ........................................ 647
17-2Intel^® ICH7 Modem Mixer Register Configuration........................................................ 655
17-3Modem Registers.................................................................................................... 656
18-1PCI Express* Configuration Registers Address Map
(PCI Express—D28:F0/F1/F2/F3/F4/F5)..................................................................... 665
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Intel ^® ICH7 Family Datasheet