307013-003 Datasheet, PDF (629/848 Pages) Intel Corporation – Intel I/O Controller Hub 7

AC ’97 Audio Controller Registers (D30:F2) (Desktop and Mobile Only)
16.1.21 PID—PCI Power Management Capability Identification
Register (Audio—D30:F2)
Address Offset: 50h–51h
Default Value: 0001h
Lockable:
No
Attribute:
Size:
Power Well:
RO
16 bits
Core
Bit
15:8
7:0
Description
Next Capability (NEXT) — RO. This field indicates that the next item in the list is at
offset 00h.
Capability ID (CAP) — RO.This field indicates that this pointer is a message signaled
interrupt capability
16.1.22 PC—Power Management Capabilities Register
(Audio—D30:F2)
Address Offset: 52h–53h
Default Value: C9C2h
Lockable:
No
Attribute:
Size:
Power Well:
RO
16 bits
Core
This register is not affected by the D3_HOT to D0 transition.
Bit
Description
15:11 PME Support — RO. This field indicates PME# can be generated from all D states.
10:9 Reserved.
8:6
Auxiliary Current — RO. This field reports 375 mA maximum suspend well current
required when in the D3_COLD state.
5
Device Specific Initialization (DSI)—RO. This field indicates that no device-specific
initialization is required.
4 Reserved — RO.
3
PME Clock (PMEC) — RO. This field indicates that PCI clock is not required to generate
PME#.
2:0
Version (VER) — RO. This field indicates support for Revision 1.1 of the PCI Power
Management Specification.
Intel ^® ICH7 Family Datasheet
629