307013-003 Datasheet, PDF (722/848 Pages) Intel Corporation – Intel I/O Controller Hub 7

Intel® High Definition Audio Controller Registers (D27:F0)
19.1.36 VCCAP—Virtual Channel Enhanced Capability Header
(Intel^® High Definition Audio Controller—D27:F0)
(Desktop and Mobile Only)
Address Offset: 100h–103h
Default Value: 13010002h
Attribute:
Size:
RO
32 bits
Bit
Description
31:20
Next Capability Offset — RO. Hardwired to 130h. Points to the next capability header
that is the Root Complex Link Declaration Enhanced Capability Header.
19:16 Capability Version — RO. Hardwired to 1h.
15:0 PCI Express* Extended Capability — RO. Hardwired to 0002h.
19.1.37 PVCCAP1—Port VC Capability Register 1
(Intel^® High Definition Audio Controller—D27:F0)
(Desktop and Mobile Only)
Address Offset: 104h–107h
Default Value: 00000001h
Attribute:
Size:
RO
32 bits
Bit
Description
31:12 Reserved.
11:10 Port Arbitration Table Entry Size — RO. Hardwired to 0 since this is an endpoint device.
9:8 Reference Clock — RO. Hardwired to 0 since this is an endpoint device.
7 Reserved.
6:4
Low Priority Extended VC Count — RO. Hardwired to 0. Indicates that only VC0 belongs
to the low priority VC group.
3 Reserved.
2:0
Extended VC Count — RO. Hardwired to 001b. Indicates that 1 extended VC (in addition
to VC0) is supported by the Intel^® High Definition Audio controller.
19.1.38 PVCCAP2 — Port VC Capability Register 2
(Intel^® High Definition Audio Controller—D27:F0)
Address Offset: 108h–10Bh
Default Value: 00000000h
Attribute:
Size:
RO
32 bits
Bit
Description
31:24
VC Arbitration Table Offset — RO. Hardwired to 0 indicating that a VC arbitration table
is not present.
23:8 Reserved.
VC Arbitration Capability — RO. Hardwired to 0. These bits are not applicable since the
7:0 Intel^® High Definition Audio controller reports a 0 in the Low Priority Extended VC
Count bits in the PVCCAP1 register.
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Intel ^® ICH7 Family Datasheet