307013-003 Datasheet, PDF (51/848 Pages) Intel Corporation – Intel I/O Controller Hub 7

Signal Description
2 Signal Description
This chapter provides a detailed description of each signal. The signals are arranged in
functional groups according to their associated interface. Figure 2-1 shows the
interface signals for the Intel^® 82801GB ICH7, 82801GR ICH7R, and 82801GDH
ICH7DH. Figure 2-2 shows the interface signals for the 82801GBM ICH7-M and
82801GHM ICH7-M DH. Figure 2-3 shows the interface signals for the 82801GU ICH7-
U.
The “#” symbol at the end of the signal name indicates that the active, or asserted
state occurs when the signal is at a low voltage level. When “#” is not present, the
signal is asserted when at the high voltage level.
The “Type” for each signal is indicative of the functional operating mode of the signal.
Unless otherwise noted in Section 3.3 or Section 3.4, a signal is considered to be in the
functional operating mode after RTCRST# for signals in the RTC well, RSMRST# for
signals in the suspend well, after PWROK for signals in the core well, and after
LAN_RST# for signals in the LAN well.
The following notations are used to describe the signal type:
I
Input Pin
O
Output Pin
OD O
Open Drain Output Pin.
I/OD
Bi-directional Input/Open Drain Output Pin.
I/O
Bi-directional Input / Output Pin.
OC
Open Collector Output Pin.
Intel ^® ICH7 Family Datasheet
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