307013-003 Datasheet, PDF (287/848 Pages) Intel Corporation – Intel I/O Controller Hub 7

Chipset Configuration Registers
7.1.45
Bit
Description
PCI Express #1 Pin (P1IP) — R/W.This field iIndicates which pin the PCI Express
port #1 drives as its interrupt.
0h = No interrupt
3:0
1h = INTA# (Default)
2h = INTB#
3h = INTC#
4h = INTD#
5h–Fh = Reserved
D27IP—Device 27 Interrupt Pin Register
Offset Address: 3110–3113h
Default Value: 00000001h
Attribute:
Size:
R/W
32-bit
7.1.46
Bit
31:4
3:0
Description
Reserved
Intel^® High Definition Audio Pin (ZIP) — R/W. This field indicates which pin the
Intel High Definition Audio controller drives as its interrupt.
0h = No interrupt
1h = INTA# (Default)
2h = INTB#
3h = INTC#
4h = INTD#
5h-Fh = Reserved
D31IR—Device 31 Interrupt Route Register
Offset Address: 3140–3141h
Default Value: 3210h
Attribute:
Size:
R/W
16-bit
Bit
15
14:12
Description
Reserved
Interrupt D Pin Route (IDR) — R/W. This field indicates which physical pin on the
Intel^® ICH7 is connected to the INTD# pin reported for device 31 functions.
0h = PIRQA#
1h = PIRQB#
2h = PIRQC#
3h = PIRQD# (Default)
4h = PIRQE#
5h = PIRQF#
6h = PIRQG#
7h = PIRQH#
NOTE: Ultra Mobile. PIRQA#–PIRQD# are not on the ICH7U. Eventhough the register
defaults to a non-ICH7U pin routing, BIOS default sets the register for
PIRQE#–PIRQH#.
11 Reserved
Intel ^® ICH7 Family Datasheet
287