307013-003 Datasheet, PDF (488/848 Pages) Intel Corporation – Intel I/O Controller Hub 7

UHCI Controllers Registers
Bit
Description
Overcurrent Active — RO. This bit is set and cleared by hardware.
10 0 = Indicates that the overcurrent pin is inactive (high).
1 = Indicates that the overcurrent pin is active (low).
Port Reset — R/W.
9 _{0 = Port is not in Reset.}
1 = Port is in Reset. When set, the port is disabled and sends the USB Reset signaling.
Low Speed Device Attached (LS) — RO.
8 _{0 = Full speed device is attached.}
1 = Low speed device is attached to this port.
7 Reserved — RO. Always read as 1.
Resume Detect (RSM_DET) — R/W. Software sets this bit to a 1 to drive resume
signaling. The host controller sets this bit to a 1 if a J-to-K transition is detected for at
least 32 microseconds while the port is in the Suspend state. The ICH7 will then reflect
the K-state back onto the bus as long as the bit remains a 1, and the port is still in the
6
suspend state (bit 12,2 are ‘11’). Writing a 0 (from 1) causes the port to send a low
speed EOP. This bit will remain a 1 until the EOP has completed.
0 = No resume (K-state) detected/driven on port.
1 = Resume detected/driven on port.
Line Status — RO. These bits reflect the D+ (bit 4) and D– (bit 5) signals lines’ logical
5:4 levels. These bits are used for fault detect and recovery as well as for USB diagnostics.
This field is updated at EOF2 time (See Chapter 11 of the USB Specification).
Port Enable/Disable Change — R/WC. For the root hub, this bit gets set only when a
port is disabled due to disconnect on that port or due to the appropriate conditions
3 ^{existing at the EOF2 point (See Chapter 11 of the USB Specification).}
0 = No change. Software clears this bit by writing a 1 to the bit location.
1 = Port enabled/disabled status has changed.
Port Enabled/Disabled (PORT_EN) — R/W. Ports can be enabled by host software
only. Ports can be disabled by either a fault condition (disconnect event or other fault
condition) or by host software. Note that the bit status does not change until the port
2 ^{state actually changes and that there may be a delay in disabling or enabling a port if}
there is a transaction currently in progress on the USB.
0 = Disable
1 = Enable
Connect Status Change — R/WC. This bit indicates that a change has occurred in the
port’s Current Connect Status (see bit 0). The hub device sets this bit for any changes
to the port device connect status, even if system software has not cleared a connect
status change. If, for example, the insertion status changes twice before system
software has cleared the changed condition, hub hardware will be setting” an already-
1
set bit (i.e., the bit will remain set). However, the hub transfers the change bit only
once when the host controller requests a data transfer to the Status Change endpoint.
System software is responsible for determining state change history in such a case.
0 = No change. Software clears this bit by writing a 1 to it.
1 = Change in Current Connect Status.
Current Connect Status — RO. This value reflects the current state of the port, and
may not correspond directly to the event that caused the Connect Status Change bit
0 ^{(Bit 1) to be set.}
0 = No device is present.
1 = Device is present on port.
§
488
Intel ^® ICH7 Family Datasheet