307013-003 Datasheet, PDF (529/848 Pages) Intel Corporation – Intel I/O Controller Hub 7

SATA Controller Registers (D31:F2) (Desktop and Mobile Only)
12.3.2 Port Registers (D31:F2)
Table 12-5. Port [3:0] DMA Register Address Map (Sheet 1 of 2)
ABAR +
Offset
Mnemonic
Register
100h–103h
104h–107h
108h–10Bh
10Ch–10Fh
110h–113h
114h–117h
118h–11Ch
11Ch–11Fh
120h–123h
124h–127h
128h–12Bh
12Ch–12Fh
130h–133h
134h–137h
138h–13Bh
13Ch–17Fh
180h–1FFh
(Mobile Only)
180h–183h
184h–187h
188h–18Bh
18Ch–18Fh
190h–193h
194h–197h
198h–19Ch
19Ch–19Fh
1A0h–1A3h
1A4h–1A7h
1A8h–1ABh
1ACh–1AFh
1B0h–1B3h
1B4h–1B7h
1B8h–1BBh
1BCh–1FFh
200h–203h
204h–207h
208h–20Bh
P0CLB
P0CLBU
P0FB
P0FBU
P0IS
P0IE
P0CMD
—
P0TFD
P0SIG
P0SSTS
P0SCTL
P0SERR
P0SACT
P0CI
—
—
P1CLB
P1CLBU
P1FB
P1FBU
P1IS
P1IE
P1CMD
—
P1TFD
P1SIG
P1SSTS
P1SCTL
P1SERR
P1SACT
P1CI
—
P2CLB
P2CLBU
P2FB
Port 0 Command List Base Address
Port 0 Command List Base Address Upper 32-Bits
Port 0 FIS Base Address
Port 0 FIS Base Address Upper 32-Bits
Port 0 Interrupt Status
Port 0 Interrupt Enable
Port 0 Command
Reserved
Port 0 Task File Data
Port 0 Signature
Port 0 Serial ATA Status
Port 0 Serial ATA Control
Port 0 Serial ATA Error
Port 0 Serial ATA Active
Port 0 Command Issue
Reserved
Reserved
Registers are not available and software must
not read from or write to registers.
Port 1 Command List Base Address
Port 1 Command List Base Address Upper 32-Bits
Port 1 FIS Base Address
Port 1 FIS Base Address Upper 32-Bits
Port 1 Interrupt Status
Port 1 Interrupt Enable
Port 1 Command
Reserved
Port 1 Task File Data
Port 1 Signature
Port 1 Serial ATA Status
Port 1 Serial ATA Control
Port 1 Serial ATA Error
Port 1 Serial ATA Active
Port 1 Command Issue
Reserved
Port 2 Command List Base Address
Port 2 Command List Base Address Upper 32-Bits
Port 2 FIS Base Address
Intel ^® ICH7 Family Datasheet
529