307013-003 Datasheet, PDF (614/848 Pages) Intel Corporation – Intel I/O Controller Hub 7

IDE Controller Registers (D31:F1)
15.1.26 ATC—APM Trapping Control Register (IDE—D31:F1)
Address Offset: C0h
Default Value: 00h
Attribute:
Size:
R/W
8 bits
Bit
Description
7:2 Reserved
Slave Trap (PST) — R/W.
1 ^{0 = Disable.}
1 = Enables trapping and SMI# assertion on legacy I/O accesses to 1F0h–1F7h and
3F6h. The active device must be the slave device for the trap and/or SMI# to occur.
Master Trap (PMT) — R/W.
0 ^{0 = Disable.}
1 = Enables trapping and SMI# assertion on legacy I/O accesses to 1F0h–1F7h and
3F6h. The active device must be master device for the trap and/or SMI# to occur.
15.1.27 ATS—APM Trapping Status Register (IDE—D31:F1)
Address Offset: C4h
Default Value: 00h
Attribute:
Size:
R/WC
8 bits
Bit
Description
7:2 Reserved
Slave Trap Status (PSTS) — R/WC.
1
1 = Trap occurred to the slave device
Master Trap Status (PMTS) — R/WC.
0
0 = Trap occurred to the master device
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Intel ^® ICH7 Family Datasheet