307013-003 Datasheet, PDF (551/848 Pages) Intel Corporation – Intel I/O Controller Hub 7

EHCI Controller Registers (D29:F7)
13.1.12 SID—USB EHCI Subsystem ID Register
(USB EHCI—D29:F7)
Address Offset: 2Eh–2Fh
Default Value: XXXXh
Reset:
None
Attribute:
Size:
R/W (special)
16 bits
Bit
15:0
Description
Subsystem ID (SID) — R/W (special). BIOS sets the value in this register to identify
the Subsystem ID. This register, in combination with the Subsystem Vendor ID register,
enables the operating system to distinguish each subsystem from other(s).
NOTE: Writes to this register are enabled when the WRT_RDONLY bit (D29:F7:80h, bit
0) is set to 1.
13.1.13 CAP_PTR—Capabilities Pointer Register
(USB EHCI—D29:F7)
Address Offset: 34h
Default Value: 50h
Attribute:
Size:
RO
8 bits
Bit
Description
7:0
Capabilities Pointer (CAP_PTR) — RO. This register points to the starting offset of the
USB 2.0 capabilities ranges.
13.1.14 INT_LN—Interrupt Line Register
(USB EHCI—D29:F7)
Address Offset: 3Ch
Default Value: 00h
Attribute:
Size:
R/W
8 bits
Bit
Description
Interrupt Line (INT_LN) — R/W. This data is not used by the Intel^® ICH7. It is used
7:0 as a scratchpad register to communicate to software the interrupt line that the
interrupt pin is connected to.
13.1.15 INT_PN—Interrupt Pin Register
(USB EHCI—D29:F7)
Address Offset: 3Dh
Default Value: See Description
Attribute:
Size:
RO
8 bits
Bit
Description
Interrupt Pin — RO. This reflects the value of D29IP.EIP (Chipset Config
7:0 Registers:Offset 3108:bits 31:28).
NOTE: Bits 7:4 are always 0h
Intel ^® ICH7 Family Datasheet
551