307013-003 Datasheet, PDF (3/848 Pages) Intel Corporation – Intel I/O Controller Hub 7

Contents
1 Introduction ............................................................................................................ 39
1.1 Overview ......................................................................................................... 42
1.2 Intel^® ICH7 Family High-Level Component Differences ........................................... 50
2 Signal Description ................................................................................................... 51
2.1 Direct Media Interface (DMI) to Host Controller ..................................................... 55
2.2 PCI Express* (Desktop and Mobile Only) .............................................................. 55
2.3 Platform LAN Connect Interface (Desktop and Mobile Only)..................................... 56
2.4 EEPROM Interface (Desktop and Mobile Only)........................................................ 56
2.5 Firmware Hub Interface (Desktop and Mobile Only)................................................ 56
2.6 PCI Interface .................................................................................................... 57
2.7 Serial ATA Interface (Desktop and Mobile Only) ..................................................... 59
2.8 IDE Interface .................................................................................................... 60
2.9 LPC Interface.................................................................................................... 62
2.10 Interrupt Interface ............................................................................................ 62
2.11 USB Interface ................................................................................................... 63
2.12 Power Management Interface.............................................................................. 64
2.13 Processor Interface............................................................................................ 66
2.14 SMBus Interface................................................................................................ 68
2.15 System Management Interface............................................................................ 68
2.16 Real Time Clock Interface ................................................................................... 69
2.17 Other Clocks..................................................................................................... 69
2.18 Miscellaneous Signals ........................................................................................ 70
2.19 AC ’97/Intel^® High Definition Audio Link ............................................................... 71
2.20 Serial Peripheral Interface (SPI) (Desktop and Mobile Only) .................................... 72
2.21 Intel^® Quick Resume Technology (Intel^® ICH7DH Only) ......................................... 72
2.22 General Purpose I/O Signals ............................................................................... 72
2.23 Power and Ground ............................................................................................. 74
2.24 Pin Straps ........................................................................................................ 76
2.24.1 Functional Straps ................................................................................... 76
2.24.2 External RTC Circuitry ............................................................................. 78
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Intel^® ICH7 Pin States............................................................................................. 79
3.1 Integrated Pull-Ups and Pull-Downs ..................................................................... 79
3.2 IDE Integrated Series Termination Resistors.......................................................... 80
3.3 Output and I/O Signals Planes and States............................................................. 81
3.4 Power Planes for Input Signals ............................................................................ 90
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Intel^® ICH7 and System Clock Domains................................................................... 95
5 Functional Description ............................................................................................. 99
5.1 PCI-to-PCI Bridge (D30:F0) ................................................................................ 99
5.1.1 PCI Bus Interface ................................................................................... 99
5.1.2 PCI Bridge As an Initiator ........................................................................ 99
5.1.2.1
5.1.2.2
5.1.2.3
5.1.2.4
5.1.2.5
5.1.2.6
5.1.2.7
5.1.2.8
Memory Reads and Writes.......................................................... 99
I/O Reads and Writes .............................................................. 100
Configuration Reads and Writes ................................................ 100
Locked Cycles......................................................................... 100
Target / Master Aborts ............................................................. 100
Secondary Master Latency Timer............................................... 100
Dual Address Cycle (DAC) ........................................................ 100
Memory and I/O Decode to PCI................................................. 101
5.1.3 Parity Error Detection and Generation ..................................................... 101
5.1.4 PCIRST# ............................................................................................. 101
Intel ^® ICH7 Family Datasheet
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