307013-003 Datasheet, PDF (504/848 Pages) Intel Corporation – Intel I/O Controller Hub 7

SATA Controller Registers (D31:F2) (Desktop and Mobile Only)
Bit
Description
Primary Drive 1 Cycle Time (PCT1) — R/W. For Ultra ATA mode, the setting of these
bits determines the minimum write strobe cycle time (CT). The DMARDY#-to-STOP
(RP) time is also determined by the setting of these bits.
PCB1 = 0 (33 MHz clk) PCB1 = 1 (66 MHz clk)
FAST_PCB1 = 1
(133 MHz clk)
00 = CT 4 clocks, RP 6
5:4
clocks
00 = Reserved
00 = Reserved
01 = CT 3 clocks, RP 5
clocks
01 = CT 3 clocks, RP 8
clocks
01 = CT 3 clocks, RP 16
clocks
10 = CT 2 clocks, RP 4
clocks
10 = CT 2 clocks, RP 8
clocks
10 = Reserved
11 = Reserved
11 = Reserved
11 = Reserved
3:2 Reserved
Primary Drive 0 Cycle Time (PCT0) — R/W. For Ultra ATA mode, the setting of these
bits determines the minimum write strobe cycle time (CT). The DMARDY#-to-STOP
(RP) time is also determined by the setting of these bits.
PCB1 = 0 (33 MHz clk) PCB1 = 1 (66 MHz clk)
FAST_PCB1 = 1
(133 MHz clk)
00 = CT 4 clocks, RP 6
1:0
clocks
00 = Reserved
00 = Reserved
01 = CT 3 clocks, RP 5
clocks
01 = CT 3 clocks, RP 8
clocks
01 = CT 3 clocks, RP 16
clocks
10 = CT 2 clocks, RP 4
clocks
10 = CT 2 clocks, RP 8
clocks
10 = Reserved
11 = Reserved
11 = Reserved
11 = Reserved
12.1.25 IDE_CONFIG—IDE I/O Configuration Register
(SATA–D31:F2)
Address Offset: 54h–57h
Default Value: 00000000h
Attribute:
Size:
R/W
32 bits
Note:
This register is R/W to maintain software compatibility and enable parallel ATA
functionality when the PCI functions are combined. These bits have no effect on SATA
operation, unless otherwise noted.
Bit
Description
31:24 Reserved
23:20 Scratchpad (SP2). Intel^® ICH7 does not perform any actions on these bits.
19:18
SEC_SIG_MODE — R/W. These bits are used to control mode of the Secondary IDE
signal pins for mobile swap bay support.
If the SRS bit (Chipset Config Registers:Offset 3414h:bit 1) is 1, the reset states of bits
19:18 will be 01 (tri-state) instead of 00 (normal).
00 = Normal (Enabled)
01 = Tri-state (Disabled)
10 = Drive low (Disabled)
11 = Reserved
504
Intel ^® ICH7 Family Datasheet