307013-003 Datasheet, PDF (201/848 Pages) Intel Corporation – Intel I/O Controller Hub 7

Functional Description
5.19.4.2
5.19.4.3
5.19.4.4
5.19.4.5
5.19.4.6
5.19.4.7
5.19.5
5.19.6
SYNC Field
All packets begin with a synchronization (SYNC) field, which is a coded sequence that
generates a maximum edge transition density. The SYNC field appears on the bus as
IDLE followed by the binary string “KJKJKJKK,” in its NRZI encoding. It is used by the
input circuitry to align incoming data with the local clock and is defined to be 8 bits in
length. SYNC serves only as a synchronization mechanism and is not shown in the
following packet diagrams. The last two bits in the SYNC field are a marker that is used
to identify the first bit of the PID. All subsequent bits in the packet must be indexed
from this point.
Packet Field Formats
All packets have distinct start and end of packet delimiters. Full details are given in the
Universal Serial Bus Specification, Revision 2.0, in Section 8.3.1.
Address Fields
Function endpoints are addressed using the function address field and the endpoint
field. Full details on this are given in the Universal Serial Bus Specification, Revision
2.0, in Section 8.3.2.
Frame Number Field
The frame number field is an 11-bit field that is incremented by the host on a per frame
basis. The frame number field rolls over upon reaching its maximum value of 7FFh, and
is sent only for SOF tokens at the start of each frame.
Data Field
The data field may range from 0 to 1023 bytes and must be an integral numbers of
bytes. Data bits within each byte are shifted out LSB first.
Cyclic Redundancy Check (CRC)
CRC is used to protect the all non-PID fields in token and data packets. In this context,
these fields are considered to be protected fields. Full details on this are given in the
Universal Serial Bus Specification, Revision 2.0, in Section 8.3.5.
Packet Formats
The USB protocol calls out several packet types: token, data, and handshake packets.
Full details on this are given in the Universal Serial Bus Specification, Revision 2.0, in
section 8.4.
USB Interrupts
There are two general groups of USB interrupt sources, those resulting from execution
of transactions in the schedule, and those resulting from an ICH7 operation error. All
transaction-based sources can be masked by software through the ICH7’s Interrupt
Enable register. Additionally, individual transfer descriptors can be marked to generate
an interrupt on completion.
When the ICH7 drives an interrupt for USB, it internally drives the PIRQA# pin for USB
function #0 and USB function #3, PIRQD# pin for USB function #1, and the PIRQC#
pin for USB function #2, until all sources of the interrupt are cleared. In order to
accommodate some operating systems, the Interrupt Pin register must contain a
different value for each function of this new multi-function device.
Intel ^® ICH7 Family Datasheet
201