307013-003 Datasheet, PDF (10/848 Pages) Intel Corporation – Intel I/O Controller Hub 7

5.27
5.26.2 CE-like On/Off ...................................................................................... 249
5.26.3 Intel^® Quick Resume Technology Signals (ICH7DH Only)............................ 250
5.26.4 Power Button Sequence (ICH7DH Only) ................................................... 250
Feature Capability Mechanism ........................................................................... 251
6 Register and Memory Mapping ............................................................................... 253
6.1 PCI Devices and Functions ................................................................................ 254
6.2 PCI Configuration Map ...................................................................................... 255
6.3 I/O Map.......................................................................................................... 255
6.3.1 Fixed I/O Address Ranges ...................................................................... 255
6.3.2 Variable I/O Decode Ranges ................................................................... 258
6.4 Memory Map ................................................................................................... 259
6.4.1 Boot-Block Update Scheme .................................................................... 261
7 Chipset Configuration Registers ............................................................................. 263
7.1 Chipset Configuration Registers (Memory Space).................................................. 263
7.1.1 VCH—Virtual Channel Capability Header Register ...................................... 265
7.1.2 VCAP1—Virtual Channel Capability #1 Register ......................................... 265
7.1.3 VCAP2—Virtual Channel Capability #2 Register ......................................... 266
7.1.4 PVC—Port Virtual Channel Control Register............................................... 266
7.1.5 PVS—Port Virtual Channel Status Register ................................................ 266
7.1.6 V0CAP—Virtual Channel 0 Resource Capability Register .............................. 267
7.1.7 V0CTL—Virtual Channel 0 Resource Control Register .................................. 267
7.1.8 V0STS—Virtual Channel 0 Resource Status Register................................... 268
7.1.9 V1CAP—Virtual Channel 1 Resource Capability Register .............................. 268
7.1.10 V1CTL—Virtual Channel 1 Resource Control Register .................................. 269
7.1.11 V1STS—Virtual Channel 1 Resource Status Register................................... 269
7.1.12 RCTCL—Root Complex Topology Capabilities List Register ........................... 270
7.1.13 ESD—Element Self Description Register ................................................... 270
7.1.14 ULD—Upstream Link Descriptor Register .................................................. 270
7.1.15 ULBA—Upstream Link Base Address Register ............................................ 271
7.1.16 RP1D—Root Port 1 Descriptor Register..................................................... 271
7.1.17 RP1BA—Root Port 1 Base Address Register ............................................... 271
7.1.18 RP2D—Root Port 2 Descriptor Register..................................................... 272
7.1.19 RP2BA—Root Port 2 Base Address Register ............................................... 272
7.1.20 RP3D—Root Port 3 Descriptor Register..................................................... 272
7.1.21 RP3BA—Root Port 3 Base Address Register ............................................... 273
7.1.22 RP4D—Root Port 4 Descriptor Register..................................................... 273
7.1.23 RP4BA—Root Port 4 Base Address Register ............................................... 273
7.1.24 HDD—Intel^® High Definition Audio Descriptor Register............................... 274
7.1.25 HDBA—Intel^® High Definition Audio Base Address Register......................... 274
7.1.26 RP5D—Root Port 5 Descriptor Register..................................................... 274
7.1.27 RP5BA—Root Port 5 Base Address Register ............................................... 275
7.1.28 RP6D—Root Port 6 Descriptor Register..................................................... 275
7.1.29 RP6BA—Root Port 6 Base Address Register ............................................... 275
7.1.30 ILCL—Internal Link Capabilities List Register ............................................. 276
7.1.31 LCAP—Link Capabilities Register ............................................................. 276
7.1.32 LCTL—Link Control Register.................................................................... 277
7.1.33 LSTS—Link Status Register .................................................................... 277
7.1.34 RPC—Root Port Configuration Register ..................................................... 278
7.1.35 RPFN—Root Port Function Number for PCI Express Root Ports
(Desktop and Mobile only) ..................................................................... 279
7.1.36 TRSR—Trap Status Register .................................................................... 280
7.1.37 TRCR—Trapped Cycle Register ................................................................ 280
7.1.38 TWDR—Trapped Write Data Register ........................................................ 280
7.1.39 IOTRn — I/O Trap Register (0-3)............................................................. 281
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Intel ^® ICH7 Family Datasheet