307013-003 Datasheet, PDF (17/848 Pages) Intel Corporation – Intel I/O Controller Hub 7

12.1.5 RID—Revision Identification Register (SATA—D31:F2) ............................... 493
12.1.6 PI—Programming Interface Register (SATA–D31:F2) ................................. 493
12.1.6.1 When Sub Class Code Register (D31:F2:Offset 0Ah) = 01h........... 493
12.1.6.2 When Sub Class Code Register (D31:F2:Offset 0Ah) = 04h........... 494
12.1.6.3 When Sub Class Code Register (D31:F2:Offset 0Ah) = 06h........... 494
12.1.7 SCC—Sub Class Code Register (SATA–D31:F2) ......................................... 495
12.1.8 BCC—Base Class Code Register (SATA–D31:F2SATA–D31:F2) ..................... 495
12.1.9 PMLT—Primary Master Latency Timer Register (SATA–D31:F2).................... 495
12.1.10PCMD_BAR—Primary Command Block Base Address
Register (SATA–D31:F2)........................................................................ 496
12.1.11PCNL_BAR—Primary Control Block Base Address Register
(SATA–D31:F2) .................................................................................... 496
12.1.12SCMD_BAR—Secondary Command Block Base Address
Register (IDE D31:F1) .......................................................................... 496
12.1.13SCNL_BAR—Secondary Control Block Base Address
Register (IDE D31:F1) .......................................................................... 497
12.1.14BAR — Legacy Bus Master Base Address Register (SATA–D31:F2) ............... 497
12.1.15ABAR — AHCI Base Address Register (SATA–D31:F2) ................................ 497
12.1.15.1Non AHCI Capable (Intel^® ICH7 Feature Supported
Components Only) .................................................................. 497
12.1.15.2AHCI Capable (Intel^® ICH7R, ICH7DH, and Mobile Only) .............. 498
12.1.16SVID—Subsystem Vendor Identification Register (SATA–D31:F2) ................ 498
12.1.17SID—Subsystem Identification Register (SATA–D31:F2)............................. 498
12.1.18CAP—Capabilities Pointer Register (SATA–D31:F2) .................................... 499
12.1.19INT_LN—Interrupt Line Register (SATA–D31:F2)....................................... 499
12.1.20INT_PN—Interrupt Pin Register (SATA–D31:F2) ........................................ 499
12.1.21IDE_TIMP — Primary IDE Timing Register (SATA–D31:F2).......................... 499
12.1.22IDE_TIMS — Slave IDE Timing Register (SATA–D31:F2)............................. 501
12.1.23SDMA_CNT—Synchronous DMA Control Register (SATA–D31:F2)................. 502
12.1.24SDMA_TIM—Synchronous DMA Timing Register (SATA–D31:F2).................. 503
12.1.25IDE_CONFIG—IDE I/O Configuration Register (SATA–D31:F2) .................... 504
12.1.26PID—PCI Power Management Capability Identification
Register (SATA–D31:F2)........................................................................ 506
12.1.27PC—PCI Power Management Capabilities Register (SATA–D31:F2) ............... 506
12.1.28PMCS—PCI Power Management Control and Status
Register (SATA–D31:F2)........................................................................ 507
12.1.29MSICI—Message Signaled Interrupt Capability Identification (SATA–D31:F2) 507
12.1.30MSIMC—Message Signaled Interrupt Message Control (SATA–D31:F2) ......... 507
12.1.31MSIMA— Message Signaled Interrupt Message Address (SATA–D31:F2) ....... 508
12.1.32MSIMD—Message Signaled Interrupt Message Data (SATA–D31:F2) ............ 509
12.1.33MAP—Address Map Register (SATA–D31:F2)............................................. 509
12.1.34PCS—Port Control and Status Register (SATA–D31:F2) .............................. 510
12.1.35SIR—SATA Initialization Register............................................................. 511
12.1.36SIRI—SATA Indexed Registers Index ....................................................... 512
12.1.37STRD—SATA Indexed Register Data ........................................................ 512
12.1.37.1STTT1—SATA Indexed Registers Index 00h
(SATA TX Termination Test Register 1) ....................................... 513
12.1.37.2STME—SATA Indexed Registers Index C1h
(SATA Test Mode Enable Register) ............................................. 513
12.1.37.3STTT2 — SATA Indexed Registers Index 74h
(SATA TX Termination Test Register 2) ....................................... 514
12.1.38SCAP0—SATA Capability Register 0 (SATA–D31:F2)................................... 514
12.1.39SCAP1—SATA Capability Register 1 (SATA–D31:F2)................................... 515
12.1.40ATC—APM Trapping Control Register (SATA–D31:F2) ................................. 516
12.1.41ATS—APM Trapping Status Register (SATA–D31:F2) .................................. 516
12.1.42SP — Scratch Pad Register (SATA–D31:F2) .............................................. 516
Intel ^® ICH7 Family Datasheet
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