307013-003 Datasheet, PDF (417/848 Pages) Intel Corporation – Intel I/O Controller Hub 7

LPC Interface Bridge Registers (D31:F0)
10.7.4
COPROC_ERR—Coprocessor Error Register
(LPC I/F—D31:F0)
I/O Address: F0h
Default Value: 00h
Lockable:
No
Attribute:
Size:
Power Well:
R/W
8-bits
Core
10.7.5
Bits
7:0
Description
Coprocessor Error (COPROC_ERR) — R/W. Any value written to this register will
cause IGNNE# to go active, if FERR# had generated an internal IRQ13. For FERR# to
generate an internal IRQ13, the COPROC_ERR_EN bit (Device 31:Function 0, Offset D0,
Bit 13) must be 1. Reads to this register always return 00h.
RST_CNT—Reset Control Register (LPC I/F—D31:F0)
I/O Address:
Default Value:
Lockable:
CF9h
00h
No
Attribute:
Size:
Power Well:
R/W
8-bit
Core
Bit
Description
7:4 Reserved
Full Reset (FULL_RST) — R/W. This bit is used to determine the states of SLP_S3#,
SLP_S4#, and SLP_S5# after a CF9 hard reset (SYS_RST =1 and RST_CPU is set to 1),
after PWROK going low (with RSMRST# high), or after two TCO timeouts.
3
0 = Intel^® ICH7 will keep SLP_S3#, SLP_S4# and SLP_S5# high.
1 = ICH7 will drive SLP_S3#, SLP_S4# and SLP_S5# low for 3 – 5 seconds.
NOTE: When this bit is set, it also causes the full power cycle (SLP_S3/4/5# assertion)
in response to SYSRESET#, PWROK#, and Watchdog timer reset sources.
2
Reset CPU (RST_CPU) — R/W. When this bit transitions from a 0 to a 1, it initiates a
hard or soft reset, as determined by the SYS_RST bit (bit 1 of this register).
System Reset (SYS_RST) — R/W. This bit is used to determine a hard or soft reset to
the processor.
0 = When RST_CPU bit goes from 0 to 1, the ICH7 performs a soft reset by activating
INIT# for 16 PCI clocks.
1 _{1 = When RST_CPU bit goes from 0 to 1, the ICH7 performs a hard reset by activating}
PLTRST# and SUS_STAT# active for about 5-6 milliseconds, however the
SLP_S3#, SLP_S4# and SLP_S5# will NOT go active. The ICH7 main power well is
reset when this bit is 1. It also resets the resume well bits (except for those noted
throughout the datasheet).
0 Reserved
Intel ^® ICH7 Family Datasheet
417