307013-003 Datasheet, PDF (523/848 Pages) Intel Corporation – Intel I/O Controller Hub 7

SATA Controller Registers (D31:F2) (Desktop and Mobile Only)
12.3
AHCI Registers (D31:F2) (Intel^® ICH7R, ICH7DH,
ICH7-M, and ICH7-M DH Only)
Note:
These registers are AHCI-specific and available only on ICH7 components that support
AHCI (not on the 82801GB ICH7) and when the ICH7 is properly configured. The Serial
ATA Status, Control, and Error registers are special exceptions and may be accessed on
all ICH7 components if properly configured (see section Section 12.1.35 for details).
The memory mapped registers within the SATA controller exist in non-cacheable
memory space. Additionally, locked accesses are not supported. If software attempts to
perform locked transactions to the registers, indeterminate results may occur. Register
accesses shall have a maximum size of 64-bits; 64-bit access must not cross an 8-byte
alignment boundary.
The registers are divided into two sections – generic host control and port control. The
port control registers are the same for all ports, and there are as many registers banks
as there are ports.
Table 12-3. AHCI Register Address Map
ABAR + Mnemon
Offset
ic
Register
00–1Fh
20h–FFh
100h–17Fh
180h–1FFh
200h–27Fh
280h–2FFh
300h–3FFh
GHC
—
P0PCR
P1PCR
P2PCR
P3PCR
—
Generic Host Control
Reserved
Port 0 port control registers
Port 1 port control registers (Intel^® ICH7R and ICH7DH Only)
Registers are not available and software must not read or write
registers. (Mobile Only)
Port 2 port control registers
Port 3 port control registers (ICH7R and ICH7DH Only)
Registers are not available and software must not read or write
registers. (Mobile Only)
Reserved
Intel ^® ICH7 Family Datasheet
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