307013-003 Datasheet, PDF (327/848 Pages) Intel Corporation – Intel I/O Controller Hub 7

LAN Controller Registers (B1:D8:F0) (Desktop and Mobile Only)
8.2.14 Statistical Counters (LAN Controller—B1:D8:F0)
Table 8-6.
The ICH7’s integrated LAN controller provides information for network management
statistics by providing on-chip statistical counters that count a variety of events
associated with both transmit and receive. The counters are updated by the LAN
controller when it completes the processing of a frame (that is, when it has completed
transmitting a frame on the link or when it has completed receiving a frame). The
Statistical Counters are reported to the software on demand by issuing the Dump
Statistical Counters command or Dump and Reset Statistical Counters command in the
SCB Command Unit Command (CUC) field.
Statistical Counters (Sheet 1 of 2)
ID
Counter
Description
0
Transmit Good
Frames
This counter contains the number of frames that were
transmitted properly on the link. It is updated only after the
actual transmission on the link is completed, not when the frame
was read from memory as is done for the Transmit Command
Block status.
Transmit Maximum This counter contains the number of frames that were not
4 Collisions (MAXCOL) transmitted because they encountered the configured maximum
Errors
number of collisions.
Transmit Late
This counter contains the number of frames that were not
8 Collisions
transmitted since they encountered a collision later than the
(LATECOL) Errors configured slot time.
A transmit underrun occurs because the system bus cannot keep
up with the transmission. This counter contains the number of
12
Transmit Underrun
Errors
frames that were either not transmitted or retransmitted due to a
transmit DMA underrun. If the LAN controller is configured to
retransmit on underrun, this counter may be updated multiple
times for a single frame.
16
Transmit Lost
Carrier Sense (CRS)
This counter contains the number of frames that were
transmitted by the LAN controller despite the fact that it detected
the de-assertion of CRS during the transmission.
20
Transmit Deferred
This counter contains the number of frames that were deferred
before transmission due to activity on the link.
24
Transmit Single
Collisions
This counter contains the number of transmitted frames that
encountered one collision.
28
Transmit Multiple
Collisions
This counter contains the number of transmitted frames that
encountered more than one collision.
32
Transmit Total
Collisions
This counter contains the total number of collisions that were
encountered while attempting to transmit. This count includes
late collisions and frames that encountered MAXCOL.
36
Receive Good
Frames
This counter contains the number of frames that were received
properly from the link. It is updated only after the actual
reception from the link is completed and all the data bytes are
stored in memory.
This counter contains the number of aligned frames discarded
because of a CRC error. This counter is updated, if needed,
40 Receive CRC Errors regardless of the Receive Unit state. The Receive CRC Errors
counter is mutually exclusive of the Receive Alignment Errors
and Receive Short Frame Errors counters.
Intel ^® ICH7 Family Datasheet
327