307013-003 Datasheet, PDF (703/848 Pages) Intel Corporation – Intel I/O Controller Hub 7

PCI Express* Configuration Registers (Desktop and Mobile Only)
18.1.62 RCTCL — Root Complex Topology Capability List Register
(PCI Express—D28:F0/F1/F2/F3/F4/F5)
Address Offset: 180–183h
Default Value: 00010005h
Attribute:
Size:
RO
32 bits
Bit
Description
31:20
Next Capability (NEXT) — RO. This field indicates the next item in the list, in this
case, end of list.
19:16
Capability Version (CV) — RO. This field indicates the version of the capability
structure.
15:0
Capability ID (CID) — RO. This field indicates this is a root complex topology
capability.
18.1.63 ESD — Element Self Description Register
(PCI Express—D28:F0/F1/F2/F3/F4/F5)
Address Offset: 184h–187h
Default Value: See Description
Attribute:
Size:
RO
32 bits
Bit
Description
Port Number (PN) — RO. This field indicates the ingress port number for the root
port. There is a different value per port:
31:24
Port #
1
2
3
4
5
6
Value
01h
02h
03h
04h
05h
06h
23:16
Component ID (CID) — RO. This field returns the value of the ESD.CID field (Chipset
Configuration Space: Offset 0104h:bits 23:16) of the chip configuration section, that is
programmed by platform BIOS, since the root port is in the same component as the
RCRB.
15:8
Number of Link Entries (NLE) — RO. (Default value is 01h). This field indicates one
link entry (corresponding to the RCRB).
7:4 Reserved.
3:0
Element Type (ET) — RO. (Default value is 0h). This field indicates that the element
type is a root port.
Intel ^® ICH7 Family Datasheet
703