307013-003 Datasheet, PDF (250/848 Pages) Intel Corporation – Intel I/O Controller Hub 7

Functional Description
5.26.3
Note:
5.26.4
Note:
Just as televisions may have multiple power buttons (e.g., on the TV and on a remote
control) so may the PC (e.g., a power button on the system unit and another on the
keyboard). However, all power buttons behave the same — On/Off. The PC will not
turn On (wake up) when any key is pressed or the mouse moved just as pressing the
volume button or TV channel button does not cause the TV to turn On. Only a power
button press turns it On and Off.
Intel^® Quick Resume Technology Signals (ICH7DH Only)
To provide the end user notification of the system power state, it is recommended that
the front panel LED be used to indicate Visual Off in the same way that the front panel
LED is used to indicate the S3 system state. For example, if in the S3 state the front
panel LED is solid amber, also set the front panel LED to be solid amber upon entrance
into Visual Off.
To provide for platform implementation flexibility, the ICH7DH implements two Intel
Quick Resume Technology (QRT) signals that are multiplexed with GPIOs: EL_STATE0/
GPIO27 and EL_STATE1/GPIO28. The EL_STATE[1:0] pins may be used to control
LED(s) to provide end-user notification of the current system state or may be used as
GPIO pins (independently or combined). See Chapter 14 for further details on
controlling these signals.
The ICH7DH has an additional Intel QRT pin: EL_RSVD/GPIO26. When Intel QRT is
enabled, this signal is used exclusively as EL_RSVD and should be left as no connect.
EL_RSVD should be left as a no connect on motherboards that will implement Intel
QRT.
Power Button Sequence (ICH7DH Only)
When Intel Quick Resume Technology (QRT) is enabled and the user presses the
PWRBTN# to put the system into the Visual Off state, the following sequence is
assumed:
1. User presses the Power Button, which causes the PWRBTN# signal to go low.
2. Intel QRT logic sets the EL_PB_STS bit. If the PWRBTN_INT_EN bit is set, the ICH7
does NOT set the PWRBTN_STS bit at this point.
3. Intel QRT logic causes an SMI or SCI (depending on the SMI_OPTION_CNT bit.)
4. If the Intel QRT logic was set to cause an SMI, the SMI handler executes and then
sets the SCI_NOW_CNT bit.
5. The Intel QRT SCI handler executes.
6. The Intel QRT SCI handler needs to cause the PWRBTN_STS bit to be set, it can do
so by setting the PWRBTN_EVENT bit.
When PWRBTN_STS is set, the ICH7 causes an SCI and the normal OS handler for
PWRBTN_STS is called.
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Intel ^® ICH7 Family Datasheet