307013-003 Datasheet, PDF (519/848 Pages) Intel Corporation – Intel I/O Controller Hub 7

SATA Controller Registers (D31:F2) (Desktop and Mobile Only)
12.1.45 BFTD2—BIST FIS Transmit Data2 Register (SATA–D31:F2)
Address Offset: E8h–EBh
Default Value: 00000000h
Attribute:
Size:
R/W
32 bits
Bits
Description
31:0
BIST FIS Transmit Data 2 — R/W. The data programmed into this register will form
the contents of the third DWord of any BIST FIS initiated by the Intel^® ICH7. This
register is not port specific; its contents will be used for BIST FIS initiated on any port.
Although the 2nd and 3rd DWs of the BIST FIS are only meaningful when the “T” bit of
the BIST FIS is set to indicate “Far-End Transmit mode”, this register’s contents will be
transmitted as the BIST FIS 3rd DW regardless of whether or not the “T” bit is indicated
in the BFCS register (D31:F2:E0h).
12.2 Bus Master IDE I/O Registers (D31:F2)
The bus master IDE function uses 16 bytes of I/O space, allocated via the BAR register,
located in Device 31:Function 2 Configuration space, offset 20h. All bus master IDE I/O
space registers can be accessed as byte, word, or DWord quantities. Reading reserved
bits returns an indeterminate, inconsistent value, and writes to reserved bits have no
effect (but should not be attempted). These registers are only used for legacy
operation. Software must not use these registers when running AHCI. The description
of the I/O registers is shown in Table 12-2.
Table 12-2. Bus Master IDE I/O Register Address Map
BAR+
Offset
Mnemonic
Register
00
BMICP Command Register Primary
01
—
Reserved
02
BMISP Bus Master IDE Status Register Primary
03
04–07
08
09
—
BMIDP
BMICS
—
Reserved
Bus Master IDE Descriptor Table Pointer
Primary
Command Register Secondary
Reserved
0Ah
BMISS Bus Master IDE Status Register Secondary
0Bh
0Ch–
0Fh
—
BMIDS
Reserved
Bus Master IDE Descriptor Table Pointer
Secondary
10h
AIR
AHCI Index Register
14h
AIDR
AHCI Index Data Register
Default
Type
00h
R/W
—
RO
00h
R/W, R/
WC, RO
—
RO
xxxxxxxxh
R/W
00h
R/W
—
RO
00h
R/W, R/
WC, RO
—
RO
xxxxxxxxh
R/W
00000000
h
xxxxxxxxh
R/W, RO
R/W
Intel ^® ICH7 Family Datasheet
519