307013-003 Datasheet, PDF (145/848 Pages) Intel Corporation – Intel I/O Controller Hub 7

Functional Description
5.11.5 Data Frame Format
Table 5-20 shows the format of the data frames. For the PCI interrupts (A–D), the
output from the ICH7 is ANDed with the PCI input signal. This way, the interrupt can be
signaled via both the PCI interrupt input signal and via the SERIRQ signal (they are
shared).
Table 5-20. Data Frame Format
Data
Frame #
Interrupt
Clocks Past
Start
Frame
Comment
1
IRQ0
2
IRQ1
3
SMI#
4
IRQ3
5
IRQ4
6
IRQ5
7
IRQ6
8
IRQ7
9
IRQ8
10
IRQ9
11
IRQ10
12
IRQ11
13
IRQ12
14
IRQ13
15
IRQ14
16
IRQ15
17
IOCHCK#
18
PCI INTA#
19
PCI INTB#
20
PCI INTC#
21
PCI INTD#
2
Ignored. IRQ0 can only be generated via the internal
8524
5
8
Causes SMI# if low. Will set the SERIRQ_SMI_STS bit.
11
14
17
20
23
26
Ignored. IRQ8# can only be generated internally.
29
32
35
38
41
Ignored. IRQ13 can only be generated from FERR#
44
Not attached to PATA or SATA logic
47
Not attached to PATA or SATA logic
50
Same as ISA IOCHCK# going active.
53
Drive PIRQA#
56
Drive PIRQB#
59
Drive PIRQC#
62
Drive PIRQD#
Intel ^® ICH7 Family Datasheet
145