307013-003 Datasheet, PDF (615/848 Pages) Intel Corporation – Intel I/O Controller Hub 7

IDE Controller Registers (D31:F1)
15.2 Bus Master IDE I/O Registers (IDE—D31:F1)
The bus master IDE function uses 16 bytes of I/O space, allocated via the BMIBA
register, located in Device 31:Function 1 Configuration space, offset 20h. All bus
master IDE I/O space registers can be accessed as byte, word, or DWord quantities.
Reading reserved bits returns an indeterminate, inconsistent value, and writes to
reserved bits have no effect (but should not be attempted). The description of the I/O
registers is shown in Table 15-2.
Table 15-2. Bus Master IDE I/O Registers
BMIBASE
+ Offset
Mnemonic
Register Name
00
BMICP Bus Master IDE Command Primary
01
—
Reserved
02
BMISP Bus Master IDE Status Primary
03
04–07
—
BMIDP
Reserved
Bus Master IDE Descriptor Table Pointer
Primary
Default
00h
00h
00h
00h
xxxxxxxxh
Type
R/W
RO
R/W,
R/WC
RO
R/W
15.2.1
BMICP—Bus Master IDE Command Register
(IDE—D31:F1)
Address Offset: BMIBASE + 00h
Default Value: 00h
Attribute:
Size:
R/W
8 bits
Bit
Description
7:4 Reserved. Returns 0.
Read / Write Control (RWC) — R/W. This bit sets the direction of the bus master
transfer: This bit must NOT be changed when the bus master function is active.
3
0 = Memory reads
1 = Memory writes
2:1 Reserved. Returns 0.
Intel ^® ICH7 Family Datasheet
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