SH7055S Datasheet, PDF (996/1002 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

Table B.2 Pin States
Pin State
Reset State
Power-Down State
Power-On
Type
Pin
Name
ROMless
Expanded Mode
8 Bits 16 Bits
Expanded
Mode with
ROM
Single-
Chip Hardware Software
Mode Standby Standby
H-UDI
Module
Standby
AUD
Module
Standby
Bus-
Released No
State
Connection
H-UDI TMS I
Z
I
Z
I
I
Pulled up
internally
TRST I
Z
I
Z
I
I
Pulled up
internally
TDI I
Z
I
Z
I
I
Pulled up
internally
TDO O
Z
O
Z
O
O
O/Z
TCK I
Z
I
Z
I
I
Pulled up
internally
Table B.3 Pin States
Pin State
Type Pin Name
Hardware Standby
AUD Reset
AUD Module Standby (AUDRST = L)
Software Standby
AUDSRST = 1/
Normal Operation
No Connection
AUD AUDRST
Z
L input
H input
Pulled down internally
AUDMD
Z
I
I
Pulled up internally
AUDATA0 to Z
AUDATA3
When AUDMD = H: I
When AUDMD = L: K
(pulled up internally)
When AUDMD = H: I/O Pulled up internally
When AUDMD = L: O
AUDCK
Z
When AUDMD = H: I
When AUDMD = L: K
(pulled up internally)
When AUDMD = H: I
When AUDMD = L: O
Pulled up internally
AUDSYNC Z
When AUDMD = H: I
When AUDMD = L: K
(pulled up internally)
When AUDMD = H: I
When AUDMD = L: O
Pulled up internally
— : Not initial value
I : Input
O : Output
H : High-level output
L : Low-level output
Z : High impedance
K : Input pins become high-impedance, output pins retain their state.
Notes: *1 When the port impedance bit (HIZ) in the standby control register (SBYCR) is set to 1,
output pins become high-impedance.
*2 When the CKHIZ bit in PFCRH is set to 1, becomes high-impedance unconditionally.
Rev.2.0, 07/03, page 958 of 960