SH7055S Datasheet, PDF (91/1002 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

Table 2.16 Branch Instructions
Instruction
Instruction Code
Operation
BF label
10001011dddddddd If T = 0, disp × 2 + PC → PC; if T =
1, nop
BF/S label
10001111dddddddd Delayed branch, if T = 0, disp × 2 +
PC → PC; if T = 1, nop
BT label
10001001dddddddd If T = 1, disp × 2 + PC → PC; if T =
0, nop
BT/S label
10001101dddddddd Delayed branch, if T = 1, disp × 2 +
PC → PC; if T = 0, nop
BRA label
1010dddddddddddd Delayed branch, disp × 2 + PC →
PC
BRAF Rm
0000mmmm00100011 Delayed branch, Rm + PC → PC
BSR label
1011dddddddddddd Delayed branch, PC → PR, disp × 2
+ PC → PC
BSRF Rm
0000mmmm00000011 Delayed branch, PC → PR,
Rm†+†PC → PC
JMP @Rm
0100mmmm00101011 Delayed branch, Rm → PC
JSR @Rm
0100mmmm00001011 Delayed branch, PC → PR,
Rm → PC
RTS
0000000000001011 Delayed branch, PR → PC
Note: * One state when the program does not branch.
Execu-
tion
Cycles
3/1*
2/1*
3/1*
2/1*
2
2
2
2
2
2
2
T Bit
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Rev.2.0, 07/03, page 53 of 960