SH7055S Datasheet, PDF (539/1002 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

Figures 15.15 and 15.16 show examples of SCI receive operation using a multiprocessor format.
Start Data
1 _{bit (ID1)}
Serial
data
0 D0 D1
MPB
Stop Start Data
MPB bit bit (data 1)
D7 1 1 0 D0 D1
Stop
MPB bit
1
D7 0 1 Idling
(marking)
MPIE
RDRF
RDR
value
ID1
RXI interrupt request
(multiprocessor
interrupt), MPIE = 0
RXI interrupt handler
reads data in RDR
and clears RDRF to 0
Not station’s
ID, so MPIE is
set to 1 again
No RXI interrupt,
RDR maintains
state
Figure 15.15 SCI Receive Operation (ID Does Not Match)
(Example: 8-Bit Data with Multiprocessor Bit and One Stop Bit)
Rev.2.0, 07/03, page 501 of 960