SH7055S Datasheet, PDF (35/1002 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

21.9.1 Register Configuration......................................................................................... 724
21.9.2 Port H Data Register (PHDR) .............................................................................. 724
21.10 Port J ................................................................................................................................. 725
21.10.1 Register Configuration......................................................................................... 726
21.10.2 Port J Data Register (PJDR)................................................................................. 726
21.10.3 Port J Port Register (PJPR) .................................................................................. 727
21.11 Port K................................................................................................................................ 728
21.11.1 Register Configuration......................................................................................... 728
21.11.2 Port K Data Register (PKDR) .............................................................................. 729
21.12 Port L ................................................................................................................................ 730
21.12.1 Register Configuration......................................................................................... 730
21.12.2 Port L Data Register (PLDR)............................................................................... 731
21.12.3 Port L Port Register (PLPR) ................................................................................ 732
21.13 POD (Port Output Disable) Control.................................................................................. 732
21.14 Usage Notes ...................................................................................................................... 733
Section 22 ROM ................................................................................................735
22.1 Features ............................................................................................................................. 735
22.2 Overview........................................................................................................................... 737
22.2.1 Block Diagram ..................................................................................................... 737
22.2.2 Operating Mode ................................................................................................... 738
22.2.3 Mode Comparison................................................................................................ 739
22.2.4 Flash Memory Configuration............................................................................... 741
22.2.5 Block Division ..................................................................................................... 742
22.2.6 Programming/Erasing Interface ........................................................................... 743
22.3 Pin Configuration.............................................................................................................. 745
22.4 Register Configuration...................................................................................................... 746
22.4.1 Registers............................................................................................................... 746
22.4.2 Programming/Erasing Interface Registers ........................................................... 748
22.4.3 Programming/Erasing Interface Parameters ........................................................ 754
22.4.4 RAM Emulation Register (RAMER)................................................................... 766
22.5 On-Board Programming Mode ......................................................................................... 768
22.5.1 Boot Mode ........................................................................................................... 768
22.5.2 User Program Mode............................................................................................. 771
22.5.3 User Boot Mode................................................................................................... 782
22.6 Protection .......................................................................................................................... 785
22.6.1 Hardware Protection ............................................................................................ 785
22.6.2 Software Protection.............................................................................................. 786
22.6.3 Error Protection.................................................................................................... 787
22.7 Flash Memory Emulation in RAM ................................................................................... 789
22.8 Usage Notes ...................................................................................................................... 792
22.8.1 Switching between User MAT and User Boot MAT........................................... 792
22.8.2 Interrupts during Programming/Erasing .............................................................. 793
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