SH7055S Datasheet, PDF (631/1002 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

• Bit 7—A/D End Flag (ADF): Indicates the end of A/D conversion.
Bit 7:
ADF
0
1
Description
Indicates that A/D0 or A/D1 is performing A/D conversion, or is in the idle state
(Initial value)
[Clearing conditions]
• When ADF is read while set to 1, then 0 is written to ADF
• When the DMAC is activated by ADI0 or ADI1
Indicates that A/D0 or A/D1 has finished A/D conversion, and the digital value has
been transferred to ADDR
[Setting conditions]
• Single mode: When A/D conversion ends
• Scan mode: When all set A/D conversions end
The operation of the A/D converter after ADF is set to 1 differs between single mode and scan
mode.
In single mode, after the A/D converter transfers the digit value to ADDR, ADF is set to 1 and
the A/D converter enters the idle state. In scan mode, ADF is set to 1 after all the set
conversions end. For example, in the case of 12-channel scanning, ADF is set to 1
immediately after the end of conversion for AN8 to AN11 (group 2) or AN20 to AN23 (group
5). After ADF is set to 1, conversion continues in the case of continuous scanning, and ends in
the case of single-cycle scanning.
Note that 1 cannot be written to ADF.
• Bit 6—A/D Interrupt Enable (ADIE): Enables or disables the A/D interrupt (ADI).
To prevent incorrect operation, ensure that the ADST bit in A/D control registers 0 and 1
(ADCR0, ADCR1) is cleared to 0 before switching the operating mode.
Bit 6:
ADIE
0
1
Description
A/D interrupt (ADI0, ADI1) is disabled
A/D interrupt (ADI0, ADI1) is enabled
(Initial value)
When A/D conversion ends and the ADF bit is set to 1, an A/D0 or A/D1 A/D interrupt (ADI0,
ADI1) will be generated If the ADIE bit is 1. ADI0 and ADI1 are cleared by clearing ADF or
ADIE to 0.
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