SH7055S Datasheet, PDF (99/1002 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

Section 3 Floating-Point Unit (FPU)
3.1 Overview
The SH7055SF has an on-chip floating-point unit (FPU), The FPU’s register configuration is
shown in figure 3.1.
Floating-point registers
31
FR0
FR1
FR2
FR3
FR4
FR5
FR6
FR7
FR8
FR9
FR10
FR11
FR12
FR13
FR14
FR15
0
FR0 functions as the index register
for the FMAC instruction.
Floating-point system registers
31
0 _{Floating-point communication register}
FPUL
Specifies buffer as communication register between CPU
and FPU*.
31
0 _{Floating-point status/control register}
FPSCR
Indicates status/control information relating to FPU
exceptions*.
Note: * For details, see section 3.2, Floating-Point Registers and Floating-Point System Registers.
Figure 3.1 Overview of Register Configuration
(Floating-Point Registers and Floating-Point System Registers)
Rev.2.0, 07/03, page 61 of 960