SH7055S Datasheet, PDF(95/1002 Page) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

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SH7055S Datasheet, PDF (95/1002 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

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Table 2.19 FPU-Related CPU Instructions

Instruction

LDS Rm,FPSCR

LDS Rm,FPUL

LDS.L @Rm+, FPSCR

LDS.L @Rm+, FPUL

STS FPSCR, Rn

STS FPUL,Rn

STS.L FPSCR,@-Rn

STS.L FPUL,@-Rn

Instruction Code

Operation

0100mmmm01101010 Rm â FPSCR

0100mmmm01011010 Rm â FPUL

0100mmmm01100110 @Rm â FPSCR, Rm+ = 4

0100mmmm01010110 @Rm â FPUL, Rm+ = 4

0000nnnn01101010 FPSCR â Rn

0000nnnn01011010 FPUL â Rn

0100nnnn01100010 Rnâ = 4, FPCSR â @Rn

0100nnnn01010010 Rnâ = 4, FPUL â @Rn

Execu-

tion

Cycles T Bit

1

â

1

â

1

â

1

â

1

â

1

â

1

â

1

â

2.5 Processing States

2.5.1 State Transitions

The CPU has five processing states: power-on reset, exception processing, bus release, program

execution and power-down. Figure 2.8 shows the transitions between the states.

Rev.2.0, 07/03, page 57 of 960

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