SH7055S Datasheet, PDF (22/1002 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

Item
Page Revisions (See Manual for Details)
26.5 Flash Memory
Characteristics
Table 26.20 Flash Memory
Characteristics
906
Conditions and table amended
Conditions: V_CC = PLLV_CC = 3.3 V ±0.3 V, PV_CC1 = 5.0 V
±0.5 V/3.3 V ±0.3 V,
PV_CC2 = 5.0 V ±0.5 V, AV_CC = 5.0 V ±0.5 V,
AV = 4.5 V to AV ,
ref
CC
V_SS = PLLV_SS = AV_SS = 0 V, T_a = –40°C to
105°C.
When PV_CC1 = 3.3 V ±0.3 V, V_CC = PV_CC1.
When writing or erasing on-chip flash
memory, T_a = –40°C to 85°C.
Item
Symbol
Min
Typ
Max
Unit
Programming time*¹*²
t_P—
20
200
ms/128 bytes
Erase time*¹*³
t_E—
1
10
s/block
Reprogramming count
N_WEC
—
—
100
Times
Note: *1 Use the on-chip programming/erasing routine for programming/erasure.
*2 When all 0 are programmed.
*3 64 kbytes of block
26.6.1 Notes on Connecting
907 26.6.1 Title added
External Capacitor for Current
Stabilization
Figure 26.29 Connection of V_CL
Capacitor
Description added
…power supply (V pin) and the V pin, an capacitor
CL
ss
(0.33 to 0.47 µF) for stabilizing the internal voltage.…
Figure amended
One 0.33 to 0.47 µF capacitor
One 0.33 to 0.47 µF
capacitor
VCL ^VCL
VSS
VSS _VCL
VSS
One 0.33 to 0.47 µF
capacitor
Do not apply any power supply voltage to the VCL pin.
Use multilayer ceramics capacitors (one 0.33 to 0.47 µF
capacitor for each VCL pin), which should be located
near the pin.
26.6.2 Notes on Mode Pin Input 907 to Newly added
908
A.2 Register States in Reset and 953 to Table amended
Power-Down States
Table A.2 Register States in
Reset and Power-Down States
954
Serial
communication
interface (SCI)
SMR0 to SMR4
BRR0 to BRR4
SCR0 to SCR4
TDR0 to TDR4
SSR0 to SSR4
RDR0 to RDR4
SDCR0 to SDCR4
I/O ports
PADR, PBDR, PCDR
PDDR, PEDR, PFDR
PGDE, PHDR, PJDR
PKDR, PLDR
PAPR, PBPR, PDPR,
PJPR, PLPR
Initialized
Initialized
Pin value
Initialized Held
Intialized
Held
Initialized Held
Held
Held
Held
Held
Pin value
Rev.2.0, 07/03, page xxii of xxxviii