SH7055S Datasheet, PDF (50/1002 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

Table 1.2 Pin Functions (cont)
Type
Operating
mode control
Interrupts
Address bus
Data bus
Bus control
Symbol
MD0 to
MD2
HSTBY
NMI
IRQ0 to
IRQ7
IRQOUT
A0–A21
D0–D15
CS0–CS3
RD
WRH
WRL
WAIT
Pin No.
59, 55, 50
57
84
169, 171,
173, 175,
230, 226,
217, 218
231
7–10, 12,
14–19, 21,
23–29, 31,
33, 34
63–69, 71,
73, 74, 76,
78–82
40, 42–44
38
36
35
37
I/O
Input
Name
Mode setting
Input Hardware
standby
Input Nonmaskable
interrupt
Input
Interrupt
requests
0 to 7
Output Interrupt
request
output
Output Address bus
Input/ Data bus
output
Output Chip select
0 to 3
Output Read
Output Upper write
Output Lower write
Input Wait
Function
These pins determine the
operating mode. Do not
change the input values
during operation.
When driven low, this pin
forces a transition to hardware
standby mode.
Nonmaskable interrupt
request pin.
Acceptance on the rising edge
or falling edge can be
selected.
Maskable interrupt request
pins.
Level input or edge input can
be selected.
Indicates that an interrupt has
been generated.
Enables interrupt generation
to be recognized in the bus-
released state.
Address output pins.
16-bit bidirectional data bus
pins.
Chip select signals for
external memory or devices.
Indicates reading from an
external device.
Indicates writing of the upper
8 bits of external data.
Indicates writing of the lower 8
bits of external data.
Input for wait cycle insertion in
bus cycles during external
space access.
Rev.2.0, 07/03, page 12 of 960