SH7055S Datasheet, PDF (80/1002 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

Table 2.9 Instruction Formats (cont)
Instruction Formats
d format
15
xxxx xxxx dddd
0
dddd
d12 format
15
xxxx dddd
dddd
0
dddd
nd8 format
15
xxxx nnnn
dddd
0
dddd
i format
15
0
xxxx xxxx i i i i i i i i
ni format
15
0
xxxx nnnn i i i i i i i i
Destination
Source Operand Operand
Example
dddddddd:
Indirect GBR
with
displacement
R0 (Direct
register)
MOV.L
@(disp,GBR),R0
R0 (Direct
register)
dddddddd: Indirect MOV.L
GBR with
R0,@(disp,GBR)
displacement
dddddddd: PC
relative with
displacement
R0 (Direct
register)
MOVA
@(disp,PC),R0
—
dddddddd: PC
BF
label
relative
—
dddddddddddd: BRA label
PC relative
(label = disp
+ PC)
dddddddd: PC
relative with
displacement
nnnn: Direct
register
MOV.L
@(disp,PC),Rn
iiiiiiii: Immediate
iiiiiiii: Immediate
iiiiiiii: Immediate
iiiiiiii: Immediate
Indirect indexed
GBR
R0 (Direct
register)
—
nnnn: Direct
register
AND.B
#imm,@(R0,GBR)
AND #imm,R0
TRAPA #imm
ADD #imm,Rn
2.4 Instruction Set by Classification
2.4.1 Instruction Set by Classification
Table 2.10 lists the instructions according to their classification.
Rev.2.0, 07/03, page 42 of 960