SH7055S Datasheet, PDF (935/1002 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

26.3.10 A/D Converter Timing
Table 26.15 shows A/D converter timing.
Table 26.15 A/D Converter Timing
Conditions: V_CC = PLLV_CC = 3.3 V ±0.3 V, PV_CC1 = 5.0 V ±0.5 V/3.3 V ±0.3 V,
PV_CC2 = 5.0 V ±0.5 V, AV_CC = 5.0 V ±0.5 V, AV_ref = 4.5 V to AV_CC,
V_SS = PLLV_SS = AV_SS = 0 V, T_a = –40°C to 125°C.
When PV_CC1 = 3.3 V ±0.3 V, V_CC = PV_CC1.
When writing or erasing on-chip flash memory, T_a = –40°C to 85°C.
CSK = 0:
fop = 20–40 MHz
CSK = 1:
fop = 20 MHz
Item
Symbol Min Typ Max Min Typ Max Unit
External trigger input t_TRGS
start delay time
50 — —
50 — — ns
A/D conversion
t_CONV
time
A/D conversion start t
D
delay time
518 —
532
262 —
268 t_cyc
20 — 34
12 — 18 t
cyc
Input sampling time
t_SPL
— 128 —
— 64
t_cyc
ADEND output delay t
— — 100 — — 100 ns
ADENDD
time
Figure
Figure
26.19
Figure
26.20
CK
input
ADCR
(ADST = 1 set)
4–6 states
V_OH
t_TRGS
Figure 26.19 External Trigger Input Timing
Rev.2.0, 07/03, page 897 of 960