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SH7055S Datasheet, PDF (408/1002 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series
An example of event count operation is shown in figure 11.24. In this example, ECNT9A counts
up on both-edge, falling-edge, and rising-edge detection, H'10 is set in GR9A, and a compare-
match is generated.
An example of event cycle measurement operation is shown in figure 11.25. In this example,
GR3A in channel 3 captures TCNT3 in response to a trigger from channel 9.
Pø
TI9A
Edge
detection
signal
ECNT9A
Clock
ECNT9A
GR9A
TSR9
CMF9A
Capture
trigger
To channel 3
00
01
02 03
10
00
05
06
10
Cleared by software
Rising and falling edges
Falling edge
Figure 11.24 Event Count Operation
Rising edge
Pø
TCNT3
Clock
TCNT3 0000
Compare-match
trigger
(from channel 9)
GR3A
0001
TSR3
IMF3A
0002
0003
0004
0005
5678
5679
567A
567B
567C
567D
567E
0003
Cleared by software
567A
Figure 11.25 Event Cycle Measurement Operation
Rev.2.0, 07/03, page 370 of 960