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SH7055S Datasheet, PDF (924/1002 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series
26.3.4 Bus Timing
Table 26.9 shows bus timing.
Table 26.9 Bus Timing
Conditions: VCC = PLLVCC = 3.3 V ±0.3 V, PVCC1 = 5.0 V ±0.5 V/3.3 V ±0.3 V,
PVCC2 = 5.0 V ±0.5 V, AVCC = 5.0 V ±0.5 V, AVref = 4.5 V to AVCC,
VSS = PLLVSS = AVSS = 0 V, Ta = –40°C to 125°C.
When PVCC1 = 3.3 V ±0.3 V, VCC = PVCC1.
When writing or erasing on-chip flash memory, Ta = –40°C to 85°C.
Item
Symbol Min
Max Unit Figures
Address delay time
tAD
CS delay time 1
tCSD1
CS delay time 2
t
CSD2
Read strobe delay time 1 t
RSD1
Read strobe delay time 2 t
RSD2
Read data setup time
tRDS
Read data hold time
tRDH
Write strobe delay time 1
tWSD1
Write strobe delay time 2 t
WSD2
Write data delay time
t
WDD
Write data hold time
tWDH
WAIT setup time
tWTS
WAIT hold time
tWTH
Read data access time
tACC
Access time from read
t
OE
strobe
—
35
—
30
—
30
—
30
—
30
15
—
0
—
—
30
—
30
—
30
tcyc × m
—
15
—
0
—
tcyc × (n+1.5) – 39 —
t
cyc
×
(n+1.0)
–
39
—
Write address setup time tAS
0
—
Write address hold time
t
5
—
WR
n: Number of waits
m = 1: CS assertion extension cycle
m = 0: Normal cycle (CS assertion non-extension cycle)
ns
Figure 26.9, 26.10
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Figure 26.11
ns
ns
Figure 26.9, 26.10
ns
ns
ns
[Operating precautions]
The guaranteed operating range of power supply PVCC1 in the MCU expanded modes is only
PVCC1 = 3.3 V ±0.3 V. Do not use a voltage outside this range.
Rev.2.0, 07/03, page 886 of 960