SH7055S Datasheet, PDF (639/1002 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

When ADM1 and ADM0 are set to 10, 8-channel scan mode is set. In 8-channel scan mode,
conversion is performed continuously on the 8 channels in analog groups 6 (AN24 to AN27)
and 7 (AN28 to AN31). When the ADCS bit is cleared to 0, selecting scanning of all channels
within the groups (AN24 to AN31), conversion is performed continuously, once only for each
channel within the groups, and operation stops on completion of conversion for the last
(highest-numbered) channel.
For details of the operation in single mode and scan mode, see section 17.4, Operation.
• Bit 3—Reserved: This bit is always read as 1. The write value should always be 0.
• Bits 2 to 0—Channel Select 2 to 0 (CH2 to CH0): These bits, together with the ADM1 and
ADM0 bits, select the analog input channels.
To prevent incorrect operation, ensure that the ADST bit in A/D control register 2 (ADCR2) is
cleared to 0 before changing the analog input channel selection.
Bit:
CH2
0
1
Bit:
CH1
0
1
0
1
Bit:
CH0
0
1
0
1
0
1
0
1
Single Mode
AN24 (Initial value)
AN25
AN26
AN27
AN28
AN29
AN30
AN31
Analog Input Channels
4-Channel
Scan Mode
8-Channel
Scan Mode
AN24
AN24, AN28
AN24, AN25 AN24, AN25, AN28, AN29
AN24–AN26 AN24–AN26, AN28–AN30
AN24–AN27 AN24–AN31
AN28
AN24, AN28
AN28, AN29 AN24, AN25, AN28, AN29
AN28–AN30 AN24–AN26, AN28–AN30
AN28–AN31 AN24–AN31
Rev.2.0, 07/03, page 601 of 960