SH7055S Datasheet, PDF (543/1002 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

Start of initialization
Clear TE and RE bits to 0 in SCR
Set CKE1 and CKE0 bits in SCR
(RIE, TIE, TEIE, MPIE,TE,
1
and RE are 0)
Select transmit/receive
format in SMR and SDCR
2
Set value in BRR
3
Wait
No
1-bit interval elapsed?
Yes
Set TE and RE to 1 in SCR;
Set RIE, TIE, TEIE, and MPIE bits ⁴
End of initialization
Figure 15.18 Sample Flowchart for SCI Initialization
Transmitting Serial Data (Synchronous Mode): Figure 15.19 shows a sample flowchart for
transmitting serial data. The procedure is as follows (the steps correspond to the numbers in the
flowchart):
1. SCI initialization: Set the TxD pin function with the PFC.
2. SCI status check and transmit data write: Read SSR, check that the TDRE flag is 1, then write
transmit data in TDR and clear the TDRE flag to 0.
3. To continue transmitting serial data: After checking that the TDRE flag is 1, indicating that
data can be written, write data in TDR, then clear the TDRE flag to 0. When the DMAC is
activated by a transmit-data-empty interrupt request (TXI) to write data in TDR, the TDRE
flag is checked and cleared automatically.
Rev.2.0, 07/03, page 505 of 960