SH7055S Datasheet, PDF (85/1002 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

Table 2.12 Data Transfer Instructions
Instruction
MOV #imm,Rn
Instruction Code
1110nnnniiiiiiii
MOV.W @(disp,PC),Rn 1001nnnndddddddd
MOV.L @(disp,PC),Rn
MOV Rm,Rn
MOV.B Rm,@Rn
MOV.W Rm,@Rn
MOV.L Rm,@Rn
MOV.B @Rm,Rn
1101nnnndddddddd
0110nnnnmmmm0011
0010nnnnmmmm0000
0010nnnnmmmm0001
0010nnnnmmmm0010
0110nnnnmmmm0000
MOV.W @Rm,Rn
0110nnnnmmmm0001
MOV.L @Rm,Rn
MOV.B Rm,@–Rn
MOV.W Rm,@–Rn
MOV.L Rm,@–Rn
MOV.B @Rm+,Rn
0110nnnnmmmm0010
0010nnnnmmmm0100
0010nnnnmmmm0101
0010nnnnmmmm0110
0110nnnnmmmm0100
MOV.W @Rm+,Rn
0110nnnnmmmm0101
MOV.L @Rm+,Rn
MOV.B R0,@(disp,Rn)
MOV.W R0,@(disp,Rn)
MOV.L Rm,@(disp,Rn)
MOV.B @(disp,Rm),R0
0110nnnnmmmm0110
10000000nnnndddd
10000001nnnndddd
0001nnnnmmmmdddd
10000100mmmmdddd
MOV.W @(disp,Rm),R0 10000101mmmmdddd
MOV.L @(disp,Rm),Rn 0101nnnnmmmmdddd
MOV.B Rm,@(R0,Rn)
0000nnnnmmmm0100
Operation
Execu-
tion
T
Cycles Bit
#imm → Sign extension → 1
—
Rn
(disp × 2 + PC) → Sign
1
—
extension → Rn
(disp × 4 + PC) → Rn
1
—
Rm → Rn
1
—
Rm → (Rn)
1
—
Rm → (Rn)
1
—
Rm → (Rn)
1
—
(Rm) → Sign extension → 1
—
Rn
(Rm) → Sign extension → 1
—
Rn
(Rm) → Rn
1
—
Rn–1 → Rn, Rm → (Rn) 1
—
Rn–2 → Rn, Rm → (Rn) 1
—
Rn–4 → Rn, Rm → (Rn) 1
—
(Rm) → Sign extension → 1
—
Rn,Rm + 1 → Rm
(Rm) → Sign extension → 1
—
Rn,Rm + 2 → Rm
(Rm) → Rn,Rm + 4 → Rm 1
—
R0 → (disp + Rn)
1
—
R0 → (disp × 2 + Rn)
1
—
Rm → (disp × 4 + Rn)
1
—
(disp + Rm) → Sign
1
—
extension → R0
(disp × 2 + Rm) → Sign
1
—
extension → R0
(disp × 4 + Rm) → Rn
1
—
Rm → (R0 + Rn)
1
—
Rev.2.0, 07/03, page 47 of 960