SH7055S Datasheet, PDF (729/1002 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

• Bit 1—Reserved: This bit is always read as 0. The write value should always be 0.
• Bit 0—PJ0 Mode Bit (PJ0MD): Selects the function of pin PJ0/TIO2A.
Bit 0: PJ0MD
0
1
Description
General input/output (PJ0)
ATU-II input capture input/output compare output (TIO2A)
(Initial value)
20.3.20 Port K IO Register (PKIOR)
Bit: 15
14
13
12
11
10
9
8
PK15 PK14 PK13 PK12 PK11 PK10 PK9 PK8
IOR
IOR
IOR
IOR
IOR
IOR
IOR
IOR
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
Bit: 7
6
5
4
3
2
1
0
PK7 PK6 PK5 PK4 PK3 PK2 PK1 PK0
IOR
IOR
IOR
IOR
IOR
IOR
IOR
IOR
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
The port K IO register (PKIOR) is a 16-bit readable/writable register that selects the input/output
direction of the 16 pins in port K. Bits PK15IOR to PK0IOR correspond to pins PK15/TO8P to
PK0/TO8A. PKIOR is enabled when port K pins function as general input/output pins (PK15 to
PK0), and disabled otherwise.
When port K pins function as PK15 to PK0, a pin becomes an output when the corresponding bit
in PKIOR is set to 1, and an input when the bit is cleared to 0.
PKIOR is initialized to H'0000 by a power-on reset (excluding a WDT power-on reset), and in
hardware standby mode. It is not initialized in software standby mode or sleep mode.
20.3.21 Port K Control Registers H and L (PKCRH, PKCRL)
Port K control registers H and L (PKCRH, PKCRL) are 16-bit readable/writable registers that
select the functions of the 16 multiplex pins in port K. PKCRH selects the functions of the pins for
the upper 8 bits of port K, and PKCRL selects the functions of the pins for the lower 8 bits.
PKCRH and PKCRL are initialized to H'0000 by a power-on reset (excluding a WDT power-on
reset), and in hardware standby mode. They are not initialized in software standby mode or sleep
mode.
Rev.2.0, 07/03, page 691 of 960