SH7055S Datasheet, PDF (77/1002 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

Table 2.8 Addressing Modes and Effective Addresses (cont)
Addressing
Mode
PC relative
addressing
Instruction
Format Effective Addresses Calculation
disp:8
The effective address is the PC value sign-extended
with an 8-bit displacement (disp), doubled, and
added†to the PC value.
Equation
PC + disp ×
2
PC
disp
+
(sign-extended)
×
PC + disp × 2
2
disp:12 The effective address is the PC value sign-extended PC + disp ×
with a 12-bit displacement (disp), doubled, and added 2
to the PC value.
PC
disp
+
(sign-extended)
×
PC + disp × 2
2
Rn
The effective address is the register PC value
PC + Rn
plus Rn.
PC
+
PC + Rn
Immediate
addressing
Rn
#imm:8 The 8-bit immediate data (imm) for the TST, AND, —
OR, and XOR instructions is zero-extended.
#imm:8 The 8-bit immediate data (imm) for the MOV, ADD, —
and CMP/EQ instructions is sign-extended.
#imm:8 The 8-bit immediate data (imm) for the TRAPA
—
instruction is zero-extended and quadrupled.
Rev.2.0, 07/03, page 39 of 960