SH7055S Datasheet, PDF (104/1002 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

3.3.2 Non-Numbers (NaN)
With non-number (NaN) representation in a single-precision operation value, at least one of bits
22 to 0 is set. If bit 22 is set, this indicates a signaling NaN (sNaN). If bit 22 is reset, the value is a
quiet NaN (qNaN).
The bit pattern of a non-number (NaN) is shown in the figure below. Bit N in the figure is set for a
signaling NaN and reset for a quiet NaN. x indicates a don’t care bit (with the proviso that at least
one of bits 22 to 0 is set). In a non-number (NaN), the sign bit is a don’t care bit.
31 30
23 22
0
x
11111111
Nxxxxxxxxxxxxxxxxxxxxxx
N = 1: sNaN
N = 0: qNaN
Figure 3.4 NaN Bit Pattern
If a non-number (sNaN) is input in an operation that generates a floating-point value:
• When the EV bit in the FPSCR register is reset, the operation result (output) is a quiet NaN
(qNaN).
• When the EV bit in the FPSCR register is set, an invalid operation exception will be generated.
In this case, the contents of the operation destination register do not change.
If a quiet NaN is input in an operation that generates a floating-point value, and a signaling NaN
has not been input in that operation, the output will always be a quiet NaN irrespective of the
setting of the EV bit in the FPSCR register. An exception will not be generated in this case.
Refer to the SH-2E Programming Manual for details of floating-point operations when a non-
number (NaN) is input.
3.3.3 Denormalized Number Values
For a denormalized number floating-point value, the biased exponent is expressed as 0, the
fraction as a non-zero value, and the hidden bit as 0. In the SH7055SF’s floating-point unit, a
denormalized number (operand source or operation result) is always flushed to 0 in a floating-
point operation that generates a value (an operation other than copy).
Rev.2.0, 07/03, page 66 of 960