SH7055S Datasheet, PDF (146/1002 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

Table 7.3 Interrupt Exception Processing Vectors and Priorities (cont)
Interrupt Source
SCI3
ERI3
RXI3
TXI3
TEI3
SCI4
ERI4
RXI4
TXI4
TEI4
HCAN0
ERS0
OVR0
RM0
SLE0
WDT
ITI
HCAN1
ERS1
OVR1
RM1
SLE1
Interrupt Vector
Vector Table
Vector Address
No. Offset
Interrupt
Priority
(Initial
Value)
Priority
Corre- within IPR
sponding Setting
IPR (Bits) Range
212 H'00000350 to 0 to 15 (0) IPRK
↑
1
H'00000353
(3–0)
213 H'00000354 to
2
H'00000357
214 H'00000358 to
3
H'0000035B
215 H'0000035C to
H'0000035F
↓
4
216 H'00000360 to 0 to 15 (0) IPRL
↑
1
H'00000363
(15–12)
217 H'00000364 to
2
H'00000367
218 H'00000368 to
3
H'0000036B
219 H'0000036C to
H'0000036F
↓
4
220 H'00000370 to 0 to 15 (0) IPRL
↑
1
H'00000373
(11–8)
221 H'00000374 to
2
H'00000377
222 H'00000378 to
3
H'0000037B
223 H'0000037C to
H'0000037F
↓
4
224 H'00000380 to 0 to 15 (0) IPRL
H'00000383
(7–4)
228 H'00000390 to 0 to 15 (0) IPRL
↑
1
H'00000393
(3–0)
229 H'00000394 to
2
H'00000397
230 H'00000398 to
3
H'0000039B
231 H'0000039C to
H'0000039F
↓
4
Default
Priority
High
Low
Rev.2.0, 07/03, page 108 of 960