SH7055S Datasheet, PDF (940/1002 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

CK
(Branch trace)
AUDCK (input)
(RAM monitor)
AUDMD
t_cyc
t_RMCYC
t_AUDRSTW
t_AUDMDS
AUDCK
(output)
AUDATA3 to
AUDATA0
(output)
(output)
Figure 26.24 AUD Reset Timing
t_BTCKW
t_BTCYC
t_BTDD
t_BTDH
t_BTSD
t_BTSH
Figure 26.25 Branch Trace Timing
Rev.2.0, 07/03, page 902 of 960