SH7055S Datasheet, PDF (297/1002 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

• Bit 4—Input Capture/Compare-Match Flag 2E (IMF2E): Status flag that indicates GR2E input
capture or compare-match.
Bit 4: IMF2E
0
1
Description
[Clearing condition]
(Initial value)
When IMF2E is read while set to 1, then 0 is written to IMF2E
[Setting conditions]
• When the TCNT2A value is transferred to GR2E by an input capture
signal while GR2E is functioning as an input capture register
• When TCNT2A = GR2E while GR2E is functioning as an output compare
register
• Bit 3—Input Capture/Compare-Match Flag 2D (IMF2D): Status flag that indicates GR2D
input capture or compare-match.
Bit 3: IMF2D
0
1
Description
[Clearing condition]
(Initial value)
When IMF2D is read while set to 1, then 0 is written to IMF2D
[Setting conditions]
• When the TCNT2A value is transferred to GR2D by an input capture
signal while GR2D is functioning as an input capture register
• When TCNT2A = GR2D while GR2D is functioning as an output compare
register
• Bit 2—Input Capture/Compare-Match Flag 2C (IMF2C): Status flag that indicates GR2C input
capture or compare-match.
Bit 2: IMF2C
0
1
Description
[Clearing condition]
(Initial value)
When IMF2C is read while set to 1, then 0 is written to IMF2C
[Setting conditions]
• When the TCNT2A value is transferred to GR2C by an input capture
signal while GR2C is functioning as an input capture register
• When TCNT2A = GR2C while GR2C is functioning as an output compare
register
Rev.2.0, 07/03, page 259 of 960