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SH7055S Datasheet, PDF (18/1002 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series
Item
Page Revisions (See Manual for Details)
26.3.1 Timing for switching the 880
power supply on/off
Table 26.6 Timing for switching
the power supply on/off
Conditions amended
Conditions: VCC = PLLVCC = 3.3 V ±0.3 V, PVCC1 = 5.0 V
±0.5 V/3.3 V ±0.3 V,
PVCC2 = 5.0 V ±0.5 V, AVCC = 5.0 V ±0.5 V,
AV = 4.5 V to AV ,
ref
CC
VSS = PLLVSS = AVSS = 0 V, Ta = –40°C to
125°C.
When PVCC1 = 3.3 V ±0.3 V, VCC = PVCC1.
When writing or erasing on-chip flash
memory, Ta = –40°C to 85°C.
26.3.2 Clock Timing
881 Conditions amended
Table 26.7 Clock Timing
Conditions:
V
CC
=
PLLV
CC
=
3.3
V
±0.3
V,
PV 1
CC
=
5.0
V
±0.5 V/3.3 V ±0.3 V,
PVCC2 = 5.0 V ±0.5 V, AVCC = 5.0 V ±0.5 V,
AV = 4.5 V to AV ,
ref
CC
VSS = PLLVSS = AVSS = 0 V, Ta = –40°C to
125°C.
When PVCC1 = 3.3 V ±0.3 V, VCC = PVCC1.
When writing or erasing on-chip flash
memory, Ta = –40°C to 85°C.
26.3.3 Control Signal Timing 883 Table amended
Table 26.8 Control Signal Timing
26.3.4 Bus Timing
886
Conditions:
V
CC
=
PLLV
CC
=
3.3
V
±0.3
V,
PV 1
CC
=
5.0
V
±0.5 V/3.3 V ±0.3 V,
PVCC2 = 5.0 V ±0.5 V, AVCC = 5.0 V ±0.5 V,
AVref = 4.5 V to AVCC,
VSS = PLLVSS = AVSS = 0 V, Ta = –40°C to
125°C.
When PVCC1 = 3.3 V ±0.3 V, VCC = PVCC1.
When writing or erasing on-chip flash
memory, Ta = –40°C to 85°C.
pulse width
setup time
MD2–MD0 setup time
t
RESW
tRESS
tMDS
20
—
t
Figure 26.5
cyc
40
—
ns
20
—
tcyc
Conditions amended
Table 26.9 Bus Timing
Conditions: VCC = PLLVCC = 3.3 V ±0.3 V, PVCC1 = 5.0 V
±0.5 V/3.3 V ±0.3 V,
PV 2
CC
=
5.0
V
±0.5
V,
AV
CC
=
5.0
V
±0.5
V,
AVref = 4.5 V to AVCC,
V
SS
=
PLLV
SS
=
AV
SS
=
0
V,
T
a
=
–40°C
to
125°C.
When PVCC1 = 3.3 V ±0.3 V, VCC = PVCC1.
When writing or erasing on-chip flash
memory, Ta = –40°C to 85°C.
Rev.2.0, 07/03, page xviii of xxxviii