SH7055S Datasheet, PDF (574/1002 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

16.2.8 Abort Acknowledge Register (ABACK)
The abort acknowledge register (ABACK) is a 16-bit readable/writable register containing status
flags that indicate normal cancellation (aborting) of a mailbox (buffer) transmit messages.
Bit: 15
14
13
12
11
10
9
8
ABACK7 ABACK6 ABACK5 ABACK4 ABACK3 ABACK2 ABACK1 —
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W
R
Bit: 7
6
5
4
3
2
1
0
ABACK15 ABACK14 ABACK13 ABACK12 ABACK11 ABACK10 ABACK9 ABACK8
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
• Bits 15 to 9 and 7 to 0—Abort Acknowledge Register (ABACK7 to 1, ABACK15 to 8): These
bits indicate that a transmit message in the corresponding mailbox has been canceled (aborted)
normally.
Bit x: ABACKx
0
1
Description
[Clearing condition]
Writing 1
(Initial value)
Completion of transmit message cancellation for corresponding mailbox
• Bit 8—Reserved: This bit is always read as 0. The write value should always be 0.
Rev.2.0, 07/03, page 536 of 960