SH7055S Datasheet, PDF (344/1002 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

• Bits 7 to 3—Reserved: These bits are always read as 0. The write value should always be 0.
• Bit 2—PWM Mode 5 (T5PWM): Selects whether channel 5 operates in input capture/output
compare mode or PWM mode.
Bit 2: T5PWM
0
1
Description
Channel 5 operates in input capture/output compare mode
Channel 5 operates in PWM mode
(Initial value)
When bit T5PWM is set to 1 to select PWM mode, pins TIO5A to TIO5C become PWM
output pins, general register 5D (GR5D) functions as a cycle register, and general registers 5A
to 5C (GR5A to GR5C) function as duty registers. Settings in the timer I/O control registers
(TIOR5A, TIOR5B) are invalid, and general registers 5A to 5D (GR5A to GR5D) can be
written to. Do not use the TIO5D pin as a timer output.
• Bit 1—PWM Mode 4 (T4PWM): Selects whether channel 4 operates in input capture/output
compare mode or PWM mode.
Bit 1: T4PWM
0
1
Description
Channel 4 operates in input capture/output compare mode
Channel 4 operates in PWM mode
(Initial value)
When bit T4PWM is set to 1 to select PWM mode, pins TIO4A to TIO4C become PWM
output pins, general register 4D (GR4D) functions as a cycle register, and general registers 4A
to 4C (GR4A to GR4C) function as duty registers. Settings in the timer I/O control registers
(TIOR4A, TIOR4B) are invalid, and general registers 4A to 4D (GR4A to GR4D) can be
written to. Do not use the TIO4D pin as a timer output.
• Bit 0—PWM Mode 3 (T3PWM): Selects whether channel 3 operates in input capture/output
compare mode or PWM mode.
Bit 0: T3PWM
0
1
Description
Channel 3 operates in input capture/output compare mode
Channel 3 operates in PWM mode
(Initial value)
When bit T3PWM is set to 1 to select PWM mode, pins TIO3A to TIO3C become PWM
output pins, general register 3D (GR3D) functions as a cycle register, and general registers 3A
to 3C (GR3A to GR3C) function as duty registers. Settings in the timer I/O control registers
(TIOR3A, TIOR3B) are invalid, and general registers 3A to 3D (GR3A to GR3D) can be
written to. Do not use the TIO3D pin as a timer output.
Rev.2.0, 07/03, page 306 of 960