SH7055S Datasheet, PDF (593/1002 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

Hardware reset
MCR0 = 1 (automatic)
IRR0 = 1 (automatic)
GSR3 = 1 (automatic)
Initialization of HCAN module
Clear IRR0
HCAN port setting
BCR setting
MBCR setting
Mailbox initialization
Message transmission method initialization
MCR0 = 0
GSR3 = 0?
No
Yes
IMR setting (interrupt mask setting)
NBIMR setting (interrupt mask setting)
MC[x] setting (receive identifier setting)
LAFM setting (receive identifier mask setting)
Bit configuration mode
Period in which BCR, MBCR, etc.,
are initialized
GSR3 = 0 & 11
No
recessive bits received?
Yes
CAN bus communication enabled
: Settings by user
: Processing by hardware
Figure 16.5 Hardware Reset Flowchart
Rev.2.0, 07/03, page 555 of 960